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<div class="header">
  <div class="summary">
<a href="#groups">API Reference</a>  </div>
  <div class="headertitle"><div class="title">CAT1 Implementation Specific</div></div>
</div><!--header-->
<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">General Description</h2>
<p >This section provides details about the CAT1 implementation of the Cypress HAL. </p>
<p >All information within this section is platform specific and is provided for reference. Portable application code should depend only on the APIs and types which are documented in the <a class="el" href="group__group__hal.html">HAL Drivers</a> section.</p>
<h1><a class="anchor" id="group_hal_impl_mapping"></a>
HAL Resource Hardware Mapping</h1>
<p >The following table shows a mapping of each HAL driver to the lower level firmware driver and the corresponding hardware resource. This is intended to help understand how the HAL is implemented for CAT1 and what features the underlying hardware supports.</p>
<table class="markdownTable">
<tr class="markdownTableHead">
<th class="markdownTableHeadNone">HAL Resource   </th><th class="markdownTableHeadNone">PDL Driver(s)   </th><th class="markdownTableHeadNone">CAT1 Hardware    </th></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">ADC   </td><td class="markdownTableBodyNone">cy_adc   </td><td class="markdownTableBodyNone">SAR ADC    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">Clock   </td><td class="markdownTableBodyNone">cy_sysclk   </td><td class="markdownTableBodyNone">All clocks (system &amp; peripheral)    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">Comparator   </td><td class="markdownTableBodyNone">cy_ctb or cy_lpcomp   </td><td class="markdownTableBodyNone">CTBm or LPComp    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">CRC   </td><td class="markdownTableBodyNone">cy_crypto_core_crc   </td><td class="markdownTableBodyNone">Crypto    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">DAC   </td><td class="markdownTableBodyNone">cy_ctdac   </td><td class="markdownTableBodyNone">DAC    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">DMA   </td><td class="markdownTableBodyNone">cy_dma, cy_dmac   </td><td class="markdownTableBodyNone">DMA Controller    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">EZ-I2C   </td><td class="markdownTableBodyNone">cy_scb_ezi2c   </td><td class="markdownTableBodyNone">SCB    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">Flash   </td><td class="markdownTableBodyNone">cy_flash   </td><td class="markdownTableBodyNone">Flash    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">GPIO   </td><td class="markdownTableBodyNone">cy_gpio   </td><td class="markdownTableBodyNone">GPIO    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">Hardware Manager   </td><td class="markdownTableBodyNone">NA   </td><td class="markdownTableBodyNone">NA    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">I2C   </td><td class="markdownTableBodyNone">cy_scb_i2c   </td><td class="markdownTableBodyNone">SCB    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">I2S   </td><td class="markdownTableBodyNone">cy_i2s   </td><td class="markdownTableBodyNone">I2S    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">LPTimer   </td><td class="markdownTableBodyNone">cy_mcwdt   </td><td class="markdownTableBodyNone">MCWDT    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">Opamp   </td><td class="markdownTableBodyNone">cy_ctb   </td><td class="markdownTableBodyNone">CTBm    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">PDM/PCM   </td><td class="markdownTableBodyNone">cy_pdm_pcm   </td><td class="markdownTableBodyNone">PDM-PCM    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">PWM   </td><td class="markdownTableBodyNone">cy_pwm   </td><td class="markdownTableBodyNone">TCPWM    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">QSPI   </td><td class="markdownTableBodyNone">cy_smif   </td><td class="markdownTableBodyNone">QSPI (SMIF)    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">Quadrature Decoder   </td><td class="markdownTableBodyNone">cy_tcpwm_quaddec   </td><td class="markdownTableBodyNone">TCPWM    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">RTC   </td><td class="markdownTableBodyNone">cy_rtc   </td><td class="markdownTableBodyNone">RTC    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">SDHC   </td><td class="markdownTableBodyNone">cy_sd_host   </td><td class="markdownTableBodyNone">SD Host    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">SDIO   </td><td class="markdownTableBodyNone">cy_sd_host, or NA   </td><td class="markdownTableBodyNone">SD Host, or UDB    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">SPI   </td><td class="markdownTableBodyNone">cy_scb_spi   </td><td class="markdownTableBodyNone">SCB    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">SysPM   </td><td class="markdownTableBodyNone">cy_syspm   </td><td class="markdownTableBodyNone">System Power Resources    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">System   </td><td class="markdownTableBodyNone">cy_syslib   </td><td class="markdownTableBodyNone">System Resources    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">TDM   </td><td class="markdownTableBodyNone">cy_i2s   </td><td class="markdownTableBodyNone">I2S    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">Timer   </td><td class="markdownTableBodyNone">cy_tcpwm_counter   </td><td class="markdownTableBodyNone">TCPWM    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">TRNG   </td><td class="markdownTableBodyNone">cy_crypto_core_trng   </td><td class="markdownTableBodyNone">Crypto    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">UART   </td><td class="markdownTableBodyNone">cy_scb_uart   </td><td class="markdownTableBodyNone">SCB    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">USB Device   </td><td class="markdownTableBodyNone">cy_usbfs_dev_drv   </td><td class="markdownTableBodyNone">USB-FS    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">WDT   </td><td class="markdownTableBodyNone">cy_wdt   </td><td class="markdownTableBodyNone">WDT   </td></tr>
</table>
<h1><a class="anchor" id="group_hal_impl_errors"></a>
Device Specific Errors</h1>
<p >Error codes generated by the low level level PDL driver all use module IDs starting with <a class="el" href="group__group__result.html#gaf229ad57884c3c8e4c5ecc7f217ce8aa">CY_RSLT_MODULE_DRIVERS_PDL_BASE</a>. The exact errors are documented for each driver in the <a href="https://infineon.github.io/mtb-pdl-cat1/pdl_api_reference_manual/html/index.html">mtb-pdl-cat1 documentation</a>. </p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="groups" name="groups"></a>
API Reference</h2></td></tr>
<tr class="memitem:group__group__hal__impl__clock"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__clock.html">Clocks</a></td></tr>
<tr class="memdesc:group__group__hal__impl__clock"><td class="mdescLeft">&#160;</td><td class="mdescRight">Implementation specific interface for using the Clock driver. <br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__dma"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__dma.html">DMA (Direct Memory Access)</a></td></tr>
<tr class="memdesc:group__group__hal__impl__dma"><td class="mdescLeft">&#160;</td><td class="mdescRight">DW (DataWire) is one of two DMA hardware implementations for CAT1 (PSoC™ 6). <br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__gpio"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__gpio.html">GPIO</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__availability"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__availability.html">HAL Driver Availability Macros</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__hw__types"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__hw__types.html">CAT1 Specific Hardware Types</a></td></tr>
<tr class="memdesc:group__group__hal__impl__hw__types"><td class="mdescLeft">&#160;</td><td class="mdescRight">Aliases for types which are part of the public HAL interface but whose representations need to vary per HAL implementation. <br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__interconnect"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__interconnect.html">Interconnect (Internal Digital Routing)</a></td></tr>
<tr class="memdesc:group__group__hal__impl__interconnect"><td class="mdescLeft">&#160;</td><td class="mdescRight">The interconnect system connects the various hardware peripherals using trigger signals. <br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__pin__package"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__pin__package.html">Pins</a></td></tr>
<tr class="memdesc:group__group__hal__impl__pin__package"><td class="mdescLeft">&#160;</td><td class="mdescRight">Definitions for the pinout for each supported device. <br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__syspm"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__syspm.html">System Power Management</a></td></tr>
<tr class="memdesc:group__group__hal__impl__syspm"><td class="mdescLeft">&#160;</td><td class="mdescRight">On CAT1 devices, the Pin based Hibernate wakeup sources (<a class="el" href="group__group__hal__syspm.html#gga716955af458772e538910575cbf6e1dda9ccdbb4f654ce023bea0fafba50cab53">CYHAL_SYSPM_HIBERNATE_PINA_LOW</a>, <a class="el" href="group__group__hal__syspm.html#gga716955af458772e538910575cbf6e1dda0882eed07391eb7773ea2f4c47a7b5ff">CYHAL_SYSPM_HIBERNATE_PINA_HIGH</a>, <a class="el" href="group__group__hal__syspm.html#gga716955af458772e538910575cbf6e1dda1bf3cfcfb69b48e6b0ef5a525cc6eb3d">CYHAL_SYSPM_HIBERNATE_PINB_LOW</a>, and <a class="el" href="group__group__hal__syspm.html#gga716955af458772e538910575cbf6e1dda69f639b3f33245d1a789fd443b94b47d">CYHAL_SYSPM_HIBERNATE_PINB_HIGH</a>) are mapped to datsheet capabilities as follows:<br  />
 PINA = hibernate_wakeup[0]<br  />
 PINB = hibernate_wakeup[1]. <br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__timer"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__timer.html">Timer (Timer/Counter)</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__wdt"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__wdt.html">WDT (Watchdog Timer)</a></td></tr>
<tr class="memdesc:group__group__hal__impl__wdt"><td class="mdescLeft">&#160;</td><td class="mdescRight">The CAT1 WDT is only capable of supporting certain timeout ranges below its maximum timeout. <br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__adcmic"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__adcmic.html">ADC (Analog Digital Converter)</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__adc"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__adc.html">ADC (Analog Digital Converter)</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__comp"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__comp.html">COMP (Analog Comparator)</a></td></tr>
<tr class="memdesc:group__group__hal__impl__comp"><td class="mdescLeft">&#160;</td><td class="mdescRight">On CAT1 &amp; CAT2, the comparator driver can use either of two underlying hardware blocks: <br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__dac"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__dac.html">DAC (Digital to Analog Converter)</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__i2s"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__i2s.html">I2S (Inter-IC Sound)</a></td></tr>
<tr class="memdesc:group__group__hal__impl__i2s"><td class="mdescLeft">&#160;</td><td class="mdescRight">The CAT1 (PSoC™ 6) I2S Supports the following values for word lengths: <br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__irq"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__irq.html">IRQ Muxing (Interrupt muxing)</a></td></tr>
<tr class="memdesc:group__group__hal__impl__irq"><td class="mdescLeft">&#160;</td><td class="mdescRight">There are two situations where system interrupts do not correlate 1:1 to CPU interrupts. <br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__keyscan"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__keyscan.html">KeyScan</a></td></tr>
<tr class="memdesc:group__group__hal__impl__keyscan"><td class="mdescLeft">&#160;</td><td class="mdescRight">On CAT1 devices, the KeyScan peripheral is clocked from the shared source CLK_MF. <br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__lptimer"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__lptimer.html">LPTimer (Low-Power Timer)</a></td></tr>
<tr class="memdesc:group__group__hal__impl__lptimer"><td class="mdescLeft">&#160;</td><td class="mdescRight">The maximum number of ticks that can set to an LPTimer is 0xFFF0FFFF for non MCWDT-B devices (e.g. <br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__opamp"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__opamp.html">Opamp (Operational Amplifier)</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__pdmpcm"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__pdmpcm.html">PDM/PCM (Pulse Density Modulation to Pulse Code Modulation Converter)</a></td></tr>
<tr class="memdesc:group__group__hal__impl__pdmpcm"><td class="mdescLeft">&#160;</td><td class="mdescRight">The CAT1A PDM/PCM Supports the following conversion parameters: <br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__pwm"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__pwm.html">PWM (Pulse Width Modulator)</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__qspi"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__qspi.html">QSPI (Quad Serial Peripheral Interface)</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__quaddec"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__quaddec.html">QuadDec (Quadrature Decoder)</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__rtc"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__rtc.html">RTC (Real Time Clock)</a></td></tr>
<tr class="memdesc:group__group__hal__impl__rtc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Internally the CAT1 RTC only stores the year as a two digit BCD value (0-99); no century information is stored. <br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__sdhc"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__sdhc.html">SDHC (SD Host Controller)</a></td></tr>
<tr class="memdesc:group__group__hal__impl__sdhc"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SHDC HAL implemenation for CAT1 provides implementations for the following weak functions specified by the PDL to make their usage in SDHC HAL driver more flexible by providing user ability to use card detect, write protect, pwr en, and io select signals on custom pins instead of dedicated SDHC block pins. <br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__spi"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__spi.html">SPI (Serial Peripheral Interface)</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:group__group__hal__impl__tdm"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__tdm.html">TDM (Time Division Multiplexing)</a></td></tr>
<tr class="memdesc:group__group__hal__impl__tdm"><td class="mdescLeft">&#160;</td><td class="mdescRight">The CAT1 (PSoC™ 6) TDM Supports the following values for word lengths: <br /></td></tr>
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<tr class="memitem:group__group__hal__impl__udb__sdio"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__udb__sdio.html">UDB SDIO (Secure Digital Input Output)</a></td></tr>
<tr class="memdesc:group__group__hal__impl__udb__sdio"><td class="mdescLeft">&#160;</td><td class="mdescRight">The UDB based SDIO interface allows for communicating between a CAT1 and a Cypress wireless device such as the CYW4343W, CYW43438, or CYW43012. <br /></td></tr>
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